In making various types of semiconductor devices it is often necessary to align a semiconductor wafer with another object so that features formed in the wafer are aligned with features in the object. For example, an infra-red charge-coupled device (IR-CCD) imager has been developed which includes an array of infra-red sensitive regions in a substrate of semiconductor material for detecting an image with a charge-coupled device (CCD) register as a read-out for the detectors. (See DESIGN AND PERFORMANCE OF 64.times.128 ELEMENT PtSi SCHOTTKY-BARRIER INFRA-RED CHARGE-COUPLED DEVICE (IR-CCD) FOCAL PLANE ARRAY by W. F. Kosonocky et al. published in SPIE, Volume 344, Infra-Red Sensor Technology (1982), pp. 66.varies.77). One problem with such imagers is to achieve a high fill-factor in order to improve the sensitivity of the imager. "Fill-factor" is used to describe the ratio of the active detector area to the total area of the imager. Thus, the structure of the imager which is between the detector areas, such as the CCD registers used to carry charge from the detector areas, take up area on the device which receives the signal to be detected but do not convert the received signal to a detected signal. One method which has been developed to overcome this problem is to mount a lenticular array on the device so that the lenses of the array focus the incoming signals to the detector areas of the imager. This method is described in U.S. Pat. No. 4,524,127, to James Kane, entitled "Method of Fabricating A Silicon Lens Arry", issued June 18, 1985 (filed Apr. 27, 1983) and assigned to the same assignee as the present application. However, a problem with the use of such lenticular arrays is achieving good alignment of the lenses with the detectors.
Another example where good alignment is required is in making integrated circuits. In the manufacture of integrated circuits, patterns are formed in the semiconductor substrate and in layers of various materials coated on the surface of the substrate using a photoresist and masks. Each mask defines a pattern to be formed and must be aligned with the patterns previously formed in the integrated circuit. Because of the very small size of the integrated circuit, and thus the patterns being formed, the alignment of the mask with the integrated circuit is relatively complex requiring the use of a microscope and special alignment keys in the integrated circuit and the mask.